Описание
A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, potentially resulting in information leakage.
| Релиз | Статус | Примечание |
|---|---|---|
| devel | not-affected | see Notes |
| esm-infra-legacy/trusty | not-affected | see Notes |
| esm-infra/bionic | not-affected | see Notes |
| esm-infra/focal | not-affected | see Notes |
| esm-infra/xenial | not-affected | see Notes |
| jammy | not-affected | see Notes |
| noble | not-affected | see Notes |
| oracular | ignored | end of life, was deferred [2025-07-10] |
| plucky | ignored | end of life, was deferred [2025-07-10] |
| questing | not-affected | see Notes |
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Ссылки на источники
EPSS
3.8 Low
CVSS3
Связанные уязвимости
A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, potentially resulting in information leakage.
A transient execution vulnerability in some AMD processors may allow a ...
A transient execution vulnerability in some AMD processors may allow a user process to infer TSC_AUX even when such a read is disabled, potentially resulting in information leakage.
Уязвимость микропрограммного обеспечения процессоров AMD, связанная с недостаточной защитой служебных данных, позволяющая нарушителю раскрыть защищаемую информацию
EPSS
3.8 Low
CVSS3